rus
Issue #1/2016
A.Petrov, L.Alekseeva, A.Ivanov, V.Luchinin, A.Romanov, T.Chikyow, T.Nabatame
On the way to a neuromorphic memristor computer platform
On the way to a neuromorphic memristor computer platform
The effects of resistance switching in nanoscale films opened up large prospects for creating resistance based random access memory (ReRAM) with the cells storing data by modifying the resistance of the material.
T
he "sensational" discovery of the HP employees would have remained unnoticed by the scientific community if there had not been clear understanding of the fundamental problems in the operation of basic micro and nanoelectronic devices that need to retain a charge with the scale continuously diminishing, thus diming any extensive development prospects for elements and, in particular, for memory.
Urgent issues of non-volatile memory
There is a clear-cut need for alternative non-volatile memory with data recording high density, low power and high speed. Alternative memory means that it should be built on some other principles than the existing physical ones, allowing for versatile processor environment that integrates random-access and read-only memories, implements multilevel logic states by forming a new, so-called "neuromorphic", computing platform. The urgency of the problem is apparent with every electronic device containing internal or external memory, and the advent of personal electronics significantly heightens the requirements for memory devices.
The electronic industry is constantly urged to improve the memory technology and, ultimately, its underlying parameters. Firstly, it is necessary to increase memory density: its ability to store the increasing volume of data while reducing the cost of information bits. Secondly, memory must have greater life associated with the number of switching cycles (writes and erases). Thirdly, storage time must become longer, which is a clear parameter that does not cause any special problems in most proposed memory devices. Finally, memory must be characterized by a high speed of programming and access, i.e., the time of reads and writes should be minimized. In recent years, special attention has been apportioned to power consumption, which apparently correlates with the memory density (capacity) and mobility of devices equipped with memory.
It is clear that meeting all the mentioned requirements (seen as advantages) is hardly possible. However, the candidates come and go, but the pursuit for a «perfect» memory remains. Without dwelling too much on the discussion of numerous possible options, we will describe the most promising technologies, MRAM, FeRAM, PCM, and ReRAM, as well Flash, as the basic non-volatile memory used in modern electronic devices. We will make a brief comparison of them in the quest to find ways for creating the "perfect" memory.
The fundamental physical principles underlying Flash memory impose natural limits on its capacity and prospects of development. Firstly, it is impossible to achieve fast programming, high density, and random access. NAND flash memory offers fast programming and high density, but at the same time, it has problems with random access and relatively slow read speed. On the other hand, NOR Flash does not have random access problems, but it lags in the amount of memory and a number of other parameters. The main disadvantage of Flash memory is the small number of write cycles, which ranges between 103–104 cycles depending on operating conditions. Other disadvantages of flash memory include low write speed and chunked erase/write operations in memory cells. There is an opinion that it is impractical to reduce the element size of the conventional flash memory lower than 20 nm, because there are restrictions associated with its fundamental operation principles. Firstly, size reduction will inevitably result in higher leakage currents and, consequently, degradation of memory elements and information loss. In other words, there is a clear problem in further scaling and increasing the memory density. Secondly, reducing the size of a chip will reduce the number of "informational" electrons stored therein and, consequently, will cause a marked telegraph noise, as well as other related reliability issues. These shortcomings of flash memory are the main incentive for investigating new non-volatile memory types.
Search for new generation
non-volatile memory
A brief overview of the candidates for the role of future non-volatile memory that meets the above-mentioned requirements will start with the phase transition based memory (PCM, PRAM, PCRAM, Ovonic Unified Memory, Chalcogenide RAM) [1, 11]. Generally, memory uses heat to cause phase transition in the material, for example, in antimony-germanium telluride (GST) [12, 13], which changes its resistance. As a rule, it means phase transition between amorphous and crystalline states. A characteristic feature of a typical PCM cell is a heater included in the insulating layer between the energy-intensive material and the base electrode. The purpose of this heater is to increase the efficiency and reduce the programming power consumption. A significant advantage of this approach is the reduction of the programming current because of its localization effect. Thermal heating is applied to switch a PCM cell from its amorphous to crystalline state, defined as a "SET" process. This process uses a longer duration pulse and moderate voltage/current. The PCM cell temperature is increased to a crystallization temperature (Tcryst), but remains below the melting temperature (Tmelt). Since the material crystallization is not instantaneous, it is very important for the pulse to be long enough, and for the PCM material temperature to remain high for a sufficiently long time. After the completion of crystallization, the device changes its state from high resistance to low resistance state. The read process is relatively simple compared to reset and set processes. The read operation uses a comparatively small amplitude pulse, which does not upset the state the device memory. One of the main problems associated with PCM is power consumption. Changing the crystalline structure of the film requires a relatively high temperature and, consequently, quite a high current. Estimates show that even a 15 nm PCM requires a reset current of about 40μA [12].
Ferroelectric non-volatile memory (FeRAM) is similar to DRAM (capacitor-based ferroelectric) in its structure. The write process is accomplished by changing the polarization vector of the ferroelectric layer based on the difference of potentials between electrodes. The advantages of FeRAM over flash memory include low power consumption, fast write operations and a significantly greater maximum number of write cycles, which exceeds 1014. The shortcomings of FeRAM include much lower density, limited capacity and higher cost [13–17]. One of the world leaders in the development and manufacture of electronic components for different purposes using a patented technology of creating non-volatile ferroelectric RAM (FeRAM) is Ramtron International. It has large companies as FeRAM technology developing licensees or partners, such as Texas Instruments, Fujitsu, Toshiba, Samsung, Hynix etc. In [18] and [19], the authors make forecasts of the further development of FeRAM devices, discuss the prospects of replacing flash memory, and come to conclusions that reprogrammable memory devices based on ferroelectrics have all the good chance of becoming highly competitive among other non-volatile memory devices, provided the problems of their aging and reliability are resolved and non-destructive information reading is assured. The modern approaches to increasing the information recording density include using ferroelectric effects found in nanoscale films, for example, in doped hafnium oxide.
Magnetoresistive memory (MRAM) is a random access memory device, which, unlike other types of memory, stores information as using magnetic elements rather than electric charges or currents. This type of memory is formed of two ferromagnetic layers separated by a thin dielectric layer. Magnetoresistive memory has speed comparable to that of SRAM memory. It has the same cell density, but the power consumption is lower than in DRAM memory. It is faster and does not degrade over time in contrast to flash memory.
Resistive Random Access Memory (ReRAM) is characterized by storing data in cells through changing the material resistance, and not through electric charge. It appears to be alternative non-volatile memory with high storage density, low power consumption and high speed of operations. Ferroelectric (FeRAM) and magnetic (MRAM) memories do not meet today’s requirements, and they are unlikely to compete with flash memory even in the long term, at least, on a data density level. However, it is commonly believed that flash memory, which stores a charge, starts having problems below 20 nm. Memristors seem to meet the contemporary non-volatile memory requirements in relation to both scaling and switching speed. Moreover, memristors are more attractive due to their low power consumption when recording information and their capacity to have the multilevel states and, consequently, their prospects of being used in artificial neuromorphic computer systems with new technology of data storing, processing and transmitting.
Memristors as new
electronic components
The memristor was first described by Leon Chua in 1971 [20, 21, 22]. However, it gained significant interest only after a series of works performed by Stanley Williams and a group of researchers at the HP lab [23], who announced the creation of a solid structure with memristor properties. It is assumed that the switching and memorizing effects observed in IOM-structures for more than 40 years are the manifestation of memristor properties. The fact that they are observed in a large variety of thin oxide layer films (ZnO, NiO, SiO2, TiO2, ZrO2, SrTiO3, Pr0.7Ca0.3MnO3 etc.) and electrodes (Pt, Au, Ag, Al, TiN etc.) props up L. Chua’s idea about existence of a fourth basic element in electric electrical circuits [24-38]. This stimulates the interest for investigating the mechanisms causing the switching and memorizing effects in MDM structures. There are various theories and physical models explaining the mechanisms of resistance switching in such devices. The most famous ones include models of conduction and mechanisms of forming and rupturing conductive filaments inside the active layer [38, 39], modulation of the Schottky barrier [40, 41] associated with the processes of filling and releasing traps [35], based on the Mott-Anderson transitions [36], as well as thermochemical and electrochemical redox reactions [44, 45].
The most popular approaches to understanding the resistance switching mechanisms (both bi - and unipolar processes) are based on the models of forming and rupturing conduction filaments. Usually, they refer to variations in the concentration of oxygen vacancies in the "conduction channels". In fact, the latter is commonplace and recognized by most researchers as the main mechanism causing the phenomenon of resistance switching in MDM structures. However, disputes arise in the discussion of the "conduction channels" control mechanisms: formation and rupture, changes in the material properties, etc. The discussion becomes even more heated with the seen separation of the effect into bipolar and unipolar switching, depending on the polarity of the used voltage. All of this is further complicated by a possible dependence on the material and thickness of the operational layer (oxide), the size of the counter electrode and other factors. Although many questions remain unanswered, we can confidently say that both the type and the concentration of point defects within the layer are directly related to the processes of switching.
Besides switching mechanisms, there are a number of other unresolved issues, which prevent highly integrated memory (ReRAM) from becoming widely marketed. They include integration and compatibility with the existing technology, heterogeneity of switching structures, and parametrical instability of memory cells. Particularly noteworthy is the need in most cases to use the electroforming process (using high amplitude impulses and defined polarity), which per se presents a problem, but also related to the parametrical ambiguity of the formed non-volatile memory. Despite the abundance of unresolved problems, the interest in instrumental implementation and optimization of operational structures in memristors using different methods of active medium synthesis (mostly oxides), various configurations of multilayer structures, and various designs of devices remains unabated. This augurs well for the creation of a versatile memory device, which will be non-volatile like flash memory, ensuring fast programming, offering access speed like in SRAM, high density and low power consumption. If such a versatile memory is producible, then it may replace not only flash, but DRAM too. Hence, it will be used as a versatile carrier, which will ultimately change the principles of computational systems. In summary, we can say that resistive random access memory (ReRAM) is a good candidate for versatile memory.
At the end of this section, we present a table comparing the existing and prospective memory types (Table 1), being aware that the values for the latter are only indicative.
On the way to creating memristor memory
The technology of manufacturing resistive memory structures includes preparation of substrates, deposition of the counter electrode, usually made of metal (Pt, Au, Al,... and TiN), synthesis of the operational layer (most often, of metal oxides) and deposition of the base electrode with a diameter of 100-300 microns. Note that these are experimental samples. Metal layering uses the technology of magnetron sputtering, electron beam evaporation etc. Metal oxides are synthesized using reactive magnetron sputtering and atomic layer deposition (ALD). This synthesis is rather widespread as it creates thin metal oxide films of good quality (a wide range of materials, optimal stoichiometry, uniform thickness, sharp interface layers etc.), while the market offers high-end ALD equipment, for example, TFS 200 produced by the Finnish company Beneq.
Below is the presentation of the results obtained by the authors of this article in the formation of resistive memory elements based on memristor two-layer structures of TiO2/Al2O3 and Al2O3/TiO2, prepared by atomic layer deposition using precursors made of trimethylaluminum (TMA) and tetrakis (dimethylamino) titanium (TDMAT), and H2O at the Pt/Ti/SiO2/Si substrate temperature of 200°C. The titanium oxide (TiO2) and aluminum oxide (Al2O3) films were deposited on the Si/SiO2 substrate (monocrystalline silicon wafers with thermally grown oxide) with Pt base electrode deposited on the TFS 200 Beneq equipment (Fig.1 and Table 2). After deposition, the samples were annealed in an oxygen atmosphere at a temperature of 200°C for 30 s.
The charts of two-layer structures used in work are shown in Fig.2. The SiO2 layer with a thickness of 100 nm is formed on a substrate of p-type thermally oxidized silicon (100). The titanium adhesion layer with a thickness of 10 nm is deposited on the SiO2 layer followed by deposition of the platinum base electrode using electron beam evaporation. The counter electrodes Pt are formed by electron beam evaporation using a metal mask. The area of counter electrodes is 10-4 cm2.
The sequential arrangement of aluminum oxide and titanium layers was varied in the pursuit of the research goal. It was assumed that this would extend the functionality and improve the basic parameters of operational structures with the resistance switching and memorizing effects. Formally, the Pt/TiO2/Al2O3/Pt systems are symmetric, but have different electrical properties: for example, the resistance values of the structures after fabrication differ by seven orders of magnitude. Thereinafter, the resistance was measured using low (0.1 V) DC voltage. It was assumed that this did not significantly change the properties of the examined structures. Such noticeable differences in the resistance values of multilayer structures could be associated with the their fabrication peculiarities, in particular, with different thermal exposure duration in the synthesis of films (substrate temperature of 200°C) and possibly atmospheric effects during the annealing process after deposition (200°C, 30 s). In the first case, the "lower" film during the synthesis is at an elevated temperature for twice as long. At the time of annealing, the atmospheric effect on the "upper" layer may be significant. Note that in the present work, the layers are counted beginning from the substrate, i.e. from bottom to top.
Pt/Al2O3/TiO2/Pt Structures
The VA characteristics of Pt/Al2O3/TiO2/Pt structures are typical for memristors and demonstrate bipolar resistance switching between two stable non-volatile states (Fig.3a). It is the behavior, which is fundamental for creating non-volatile resistive memory. Stable bipolar switching with a resistance ratio Ron/Roff of about 102, driven by a low voltage of ±0.8 V (Table 3), was observed after preliminary two-stage electroforming. The high resistance state (HRS) was 2000 Ohms, and the low-resistance state (LRS) was 28 Ohms.
We assume that the first step of the non-trivial two-stage electroforming process is associated with the irreversible disruption of the Al2O3-layer: when a positive voltage (+5 V) was applied to the counter Pt-electrode (with a current limit of 10 mA), the current between the electrodes sharply increased to the limit with a significant emission of Joule heat, subsequently causing an irreversible heat disruption in the Al2O3 layer. The resistance changed by two orders of magnitude, and the system switched from the initial to "interim" state.
The second step is creation of a TiO2-x layer enriched with oxygen vacancies near the counter Pt-electrode with –2.2 V applied to it. The layer near the counter Pt-electrode is enriched with oxygen vacancies, i.e. it forms an oxygen-depleted titanium oxide layer TiO2-x. In this case, the system changes its state from the "interim" to high resistance (HRS).
The switching-on process (ON) occurs when the counter electrode receives +0.8 V (Fig.3b), and the system changes from HRS to LRS. The resistance value is changed by two orders of magnitude: from 2000 Ohms to 28 Ohms. The opposite switching (OFF) and return to HRS (Fig.3c) occurs at 0.8 V. This type of structures is characterized by a steady switching between two states, wherein both the states demonstrate a non-volatile memory effect.
Pt/TiO2/Al2O3/Pt Structures
With the opposite arrangement of TiO2 and Al2O3 layers, the resistance of structures is higher by more than seven orders of magnitude. It is clear that this value can only be attained by using an Al2O3 layer (its specific resistance is 1013–1015 Ohm·cm in contrast to 104–107 Ohm·cm for titanium oxide). The specific resistance of undoped anatase and rutile are in the range of 104–107 Ohm·cm, but with the formation of Ti3+, it is reduced to 10 Ohm∙cm for anatase and 100 Ohm∙cm for rutile [46].
It is reasonable to believe that the active switching layer in this case is Al2O3, and the TiO2 layer acts as a reservoir for oxygen vacancies. This structure stably demonstrates multi-level switching effect without a preformation process. It means that the two-layer structure of this type is ready for switching right after it is synthesized (Fig.4a). In other words, the formation process is accomplished at the stage of fabrication, i.e. synthesis and high-temperature annealing. This technology is obviously advantageous in terms of matching with the "classic" CMOS processes for creation of specialized computing systems.
The set process (SET) for the Pt/TiO2/Al2O3/Pt structures occurs at a negative voltage applied to counter electrode, and the reset process (RESET) is at a positive voltage, i.e. switching occurs in the clockwise direction, (whereas in the previous case, it was counterclockwise). These cycles are stably reproduced with resistance change by seven orders of magnitude, i.e. from 8∙1012 to 6∙105 Ohms. The switching level depends on the voltage that reduces the memorized resistance.
When negative voltage is applied to the counter electrode, oxygen vacancies drift from TiO2-x to Al2O3, thus causing a band diagram displacement resulting in the injection of charge carriers (Fig.6a).
The increase in the concentration of oxygen vacancies increases the concentration of traps (1.5 eV energy [47]) in the Al2O3 bandgap (Fig.5b) and results in emergence of conductivity in Al2O3-layer (Fig.5a). The concentration of traps depends on the applied voltage. Therefore, we can observe the emergence of conductivity and change in switching levels. The hopping transport in trap centers explains the significant conductivity rise with a small change in the potential on the counter electrode.
The dependence of the Al2O3-layer conductivity on the difference of potentials between the electrodes and, as assumed, on the concentration of localized states (N) is determined by the hopping transport mechanism, when the conductivity is subject to inelastic tunneling between the closest centers [48, 49]. It is obvious that the dielectric layer resistance in this case is determined by a grid of random resistances (Abrahams-Miller) and, to a first approximation, by the percolation radius r = 0,085 N-1/3:
,
where а = ε is the Bohr radius.
The injection into the volume can be carried out by tunneling through the Fowler-Nordheim mechanism or thermionic emission and thermally stimulated tunneling. Thermally stimulated tunneling dominates under medium fields and medium temperatures, when the thermal energy is insufficient to overcome the potential barrier at the contact.
Electronic components
of a memristor neuromorphic platform
Two-layer MDM systems of Pt/TiO2/Al2O3/Pt and Pt/Al2O3/TiO2/Pt with considerably distinct properties helped to obtain memristor structures with stable bipolar switching. The proposed switching mechanism opens up prospects for designing multi-level systems based on multilayer structures. The creation of modern micro- and nanoelectronic elements based on new physical principles opens up unlimited prospects for improving the parameters of non-volatile memory devices and developing analogous computing systems, including neuromorphic ones.
The ultimate goal of creating a new non-volatile memory device, or memristor, which functions based on resistance change (switching), is to develop systems that provide earlier unattainable parameters and features:
energy independence and energy efficiency (storage in the memory of a state corresponding to a particular conductivity rather than a charge);
multi-level logical states (storage in a single memory cell of more than one bit of data);
ultra-high density recording of information (multilayer three-level arrangement with minimum energy emission);
ultra-high speed data exchange (integration of operational and long-term memories);
unlimited information storage time ("storing" a resistance level rather than a charge).
The combination of the above functionalities has outlined the prospects for the so-called neuromorphic memristor computing platform with the following main features:
RAM with memristor memory cells (crossbars);
optical switching system of functional modules;
new computing architecture and technology, including:
integration of operational and long-term memories and new technology of data exchange;
architecture, where the memory plays a key role in performing calculations;
new data storage technology;
new operating system.
The main executor of this project titled Machine is HP’s LAB8 laboratory. A significant role in its implementation is played by Sandisk, which took over the development of SCM (Storage Class Memory) technology with the aim of building a system of Memory-Driven Computing. Among software developers of memristor-based neuromorphic computing platform, we should note Boston University, which creates specialized software called MONETA (Modular Neural Exploring Traveling Agent) for memristor memory to simulate some elements of the mammalian brain functional activity. An important place within the evolution of computer platforms is occupied by The EU Human Brain Project realized under the Horizon 2020 program. Neuromorphic physical models (for example, 20-level artificial neural network with a basic level of 4 million neurons and 1 billion synapses) and computer clusters (4Тflop/s) play a significant role in its implementation.
The major information and communication platforms for neuromorphic computing environments with various designs and technological embodiments are:
neuroinformation platform;
medical information platform;
brain modeling platform;
high-performance computing platform;
neuromorphic computing platform;
neurorobotics platform.
The illustrated experimental results [50, 51] of creating memristor structures as the basis for a new neuromorphic computing platform were worked out by the authors of this article, who represent the NIMS (National Institute for Materials Science, Japan) and St. Petersburg State Electrotechnical University (LETI) in the framework of the international project "Controlled synthesis of memristor structures based on nanoscale compositions of metal oxides by atomic layer deposition" (the work was carried out under Project 14.584.21.0005 funded by the Ministry of Education and Science of the Russian Federation).
he "sensational" discovery of the HP employees would have remained unnoticed by the scientific community if there had not been clear understanding of the fundamental problems in the operation of basic micro and nanoelectronic devices that need to retain a charge with the scale continuously diminishing, thus diming any extensive development prospects for elements and, in particular, for memory.
Urgent issues of non-volatile memory
There is a clear-cut need for alternative non-volatile memory with data recording high density, low power and high speed. Alternative memory means that it should be built on some other principles than the existing physical ones, allowing for versatile processor environment that integrates random-access and read-only memories, implements multilevel logic states by forming a new, so-called "neuromorphic", computing platform. The urgency of the problem is apparent with every electronic device containing internal or external memory, and the advent of personal electronics significantly heightens the requirements for memory devices.
The electronic industry is constantly urged to improve the memory technology and, ultimately, its underlying parameters. Firstly, it is necessary to increase memory density: its ability to store the increasing volume of data while reducing the cost of information bits. Secondly, memory must have greater life associated with the number of switching cycles (writes and erases). Thirdly, storage time must become longer, which is a clear parameter that does not cause any special problems in most proposed memory devices. Finally, memory must be characterized by a high speed of programming and access, i.e., the time of reads and writes should be minimized. In recent years, special attention has been apportioned to power consumption, which apparently correlates with the memory density (capacity) and mobility of devices equipped with memory.
It is clear that meeting all the mentioned requirements (seen as advantages) is hardly possible. However, the candidates come and go, but the pursuit for a «perfect» memory remains. Without dwelling too much on the discussion of numerous possible options, we will describe the most promising technologies, MRAM, FeRAM, PCM, and ReRAM, as well Flash, as the basic non-volatile memory used in modern electronic devices. We will make a brief comparison of them in the quest to find ways for creating the "perfect" memory.
The fundamental physical principles underlying Flash memory impose natural limits on its capacity and prospects of development. Firstly, it is impossible to achieve fast programming, high density, and random access. NAND flash memory offers fast programming and high density, but at the same time, it has problems with random access and relatively slow read speed. On the other hand, NOR Flash does not have random access problems, but it lags in the amount of memory and a number of other parameters. The main disadvantage of Flash memory is the small number of write cycles, which ranges between 103–104 cycles depending on operating conditions. Other disadvantages of flash memory include low write speed and chunked erase/write operations in memory cells. There is an opinion that it is impractical to reduce the element size of the conventional flash memory lower than 20 nm, because there are restrictions associated with its fundamental operation principles. Firstly, size reduction will inevitably result in higher leakage currents and, consequently, degradation of memory elements and information loss. In other words, there is a clear problem in further scaling and increasing the memory density. Secondly, reducing the size of a chip will reduce the number of "informational" electrons stored therein and, consequently, will cause a marked telegraph noise, as well as other related reliability issues. These shortcomings of flash memory are the main incentive for investigating new non-volatile memory types.
Search for new generation
non-volatile memory
A brief overview of the candidates for the role of future non-volatile memory that meets the above-mentioned requirements will start with the phase transition based memory (PCM, PRAM, PCRAM, Ovonic Unified Memory, Chalcogenide RAM) [1, 11]. Generally, memory uses heat to cause phase transition in the material, for example, in antimony-germanium telluride (GST) [12, 13], which changes its resistance. As a rule, it means phase transition between amorphous and crystalline states. A characteristic feature of a typical PCM cell is a heater included in the insulating layer between the energy-intensive material and the base electrode. The purpose of this heater is to increase the efficiency and reduce the programming power consumption. A significant advantage of this approach is the reduction of the programming current because of its localization effect. Thermal heating is applied to switch a PCM cell from its amorphous to crystalline state, defined as a "SET" process. This process uses a longer duration pulse and moderate voltage/current. The PCM cell temperature is increased to a crystallization temperature (Tcryst), but remains below the melting temperature (Tmelt). Since the material crystallization is not instantaneous, it is very important for the pulse to be long enough, and for the PCM material temperature to remain high for a sufficiently long time. After the completion of crystallization, the device changes its state from high resistance to low resistance state. The read process is relatively simple compared to reset and set processes. The read operation uses a comparatively small amplitude pulse, which does not upset the state the device memory. One of the main problems associated with PCM is power consumption. Changing the crystalline structure of the film requires a relatively high temperature and, consequently, quite a high current. Estimates show that even a 15 nm PCM requires a reset current of about 40μA [12].
Ferroelectric non-volatile memory (FeRAM) is similar to DRAM (capacitor-based ferroelectric) in its structure. The write process is accomplished by changing the polarization vector of the ferroelectric layer based on the difference of potentials between electrodes. The advantages of FeRAM over flash memory include low power consumption, fast write operations and a significantly greater maximum number of write cycles, which exceeds 1014. The shortcomings of FeRAM include much lower density, limited capacity and higher cost [13–17]. One of the world leaders in the development and manufacture of electronic components for different purposes using a patented technology of creating non-volatile ferroelectric RAM (FeRAM) is Ramtron International. It has large companies as FeRAM technology developing licensees or partners, such as Texas Instruments, Fujitsu, Toshiba, Samsung, Hynix etc. In [18] and [19], the authors make forecasts of the further development of FeRAM devices, discuss the prospects of replacing flash memory, and come to conclusions that reprogrammable memory devices based on ferroelectrics have all the good chance of becoming highly competitive among other non-volatile memory devices, provided the problems of their aging and reliability are resolved and non-destructive information reading is assured. The modern approaches to increasing the information recording density include using ferroelectric effects found in nanoscale films, for example, in doped hafnium oxide.
Magnetoresistive memory (MRAM) is a random access memory device, which, unlike other types of memory, stores information as using magnetic elements rather than electric charges or currents. This type of memory is formed of two ferromagnetic layers separated by a thin dielectric layer. Magnetoresistive memory has speed comparable to that of SRAM memory. It has the same cell density, but the power consumption is lower than in DRAM memory. It is faster and does not degrade over time in contrast to flash memory.
Resistive Random Access Memory (ReRAM) is characterized by storing data in cells through changing the material resistance, and not through electric charge. It appears to be alternative non-volatile memory with high storage density, low power consumption and high speed of operations. Ferroelectric (FeRAM) and magnetic (MRAM) memories do not meet today’s requirements, and they are unlikely to compete with flash memory even in the long term, at least, on a data density level. However, it is commonly believed that flash memory, which stores a charge, starts having problems below 20 nm. Memristors seem to meet the contemporary non-volatile memory requirements in relation to both scaling and switching speed. Moreover, memristors are more attractive due to their low power consumption when recording information and their capacity to have the multilevel states and, consequently, their prospects of being used in artificial neuromorphic computer systems with new technology of data storing, processing and transmitting.
Memristors as new
electronic components
The memristor was first described by Leon Chua in 1971 [20, 21, 22]. However, it gained significant interest only after a series of works performed by Stanley Williams and a group of researchers at the HP lab [23], who announced the creation of a solid structure with memristor properties. It is assumed that the switching and memorizing effects observed in IOM-structures for more than 40 years are the manifestation of memristor properties. The fact that they are observed in a large variety of thin oxide layer films (ZnO, NiO, SiO2, TiO2, ZrO2, SrTiO3, Pr0.7Ca0.3MnO3 etc.) and electrodes (Pt, Au, Ag, Al, TiN etc.) props up L. Chua’s idea about existence of a fourth basic element in electric electrical circuits [24-38]. This stimulates the interest for investigating the mechanisms causing the switching and memorizing effects in MDM structures. There are various theories and physical models explaining the mechanisms of resistance switching in such devices. The most famous ones include models of conduction and mechanisms of forming and rupturing conductive filaments inside the active layer [38, 39], modulation of the Schottky barrier [40, 41] associated with the processes of filling and releasing traps [35], based on the Mott-Anderson transitions [36], as well as thermochemical and electrochemical redox reactions [44, 45].
The most popular approaches to understanding the resistance switching mechanisms (both bi - and unipolar processes) are based on the models of forming and rupturing conduction filaments. Usually, they refer to variations in the concentration of oxygen vacancies in the "conduction channels". In fact, the latter is commonplace and recognized by most researchers as the main mechanism causing the phenomenon of resistance switching in MDM structures. However, disputes arise in the discussion of the "conduction channels" control mechanisms: formation and rupture, changes in the material properties, etc. The discussion becomes even more heated with the seen separation of the effect into bipolar and unipolar switching, depending on the polarity of the used voltage. All of this is further complicated by a possible dependence on the material and thickness of the operational layer (oxide), the size of the counter electrode and other factors. Although many questions remain unanswered, we can confidently say that both the type and the concentration of point defects within the layer are directly related to the processes of switching.
Besides switching mechanisms, there are a number of other unresolved issues, which prevent highly integrated memory (ReRAM) from becoming widely marketed. They include integration and compatibility with the existing technology, heterogeneity of switching structures, and parametrical instability of memory cells. Particularly noteworthy is the need in most cases to use the electroforming process (using high amplitude impulses and defined polarity), which per se presents a problem, but also related to the parametrical ambiguity of the formed non-volatile memory. Despite the abundance of unresolved problems, the interest in instrumental implementation and optimization of operational structures in memristors using different methods of active medium synthesis (mostly oxides), various configurations of multilayer structures, and various designs of devices remains unabated. This augurs well for the creation of a versatile memory device, which will be non-volatile like flash memory, ensuring fast programming, offering access speed like in SRAM, high density and low power consumption. If such a versatile memory is producible, then it may replace not only flash, but DRAM too. Hence, it will be used as a versatile carrier, which will ultimately change the principles of computational systems. In summary, we can say that resistive random access memory (ReRAM) is a good candidate for versatile memory.
At the end of this section, we present a table comparing the existing and prospective memory types (Table 1), being aware that the values for the latter are only indicative.
On the way to creating memristor memory
The technology of manufacturing resistive memory structures includes preparation of substrates, deposition of the counter electrode, usually made of metal (Pt, Au, Al,... and TiN), synthesis of the operational layer (most often, of metal oxides) and deposition of the base electrode with a diameter of 100-300 microns. Note that these are experimental samples. Metal layering uses the technology of magnetron sputtering, electron beam evaporation etc. Metal oxides are synthesized using reactive magnetron sputtering and atomic layer deposition (ALD). This synthesis is rather widespread as it creates thin metal oxide films of good quality (a wide range of materials, optimal stoichiometry, uniform thickness, sharp interface layers etc.), while the market offers high-end ALD equipment, for example, TFS 200 produced by the Finnish company Beneq.
Below is the presentation of the results obtained by the authors of this article in the formation of resistive memory elements based on memristor two-layer structures of TiO2/Al2O3 and Al2O3/TiO2, prepared by atomic layer deposition using precursors made of trimethylaluminum (TMA) and tetrakis (dimethylamino) titanium (TDMAT), and H2O at the Pt/Ti/SiO2/Si substrate temperature of 200°C. The titanium oxide (TiO2) and aluminum oxide (Al2O3) films were deposited on the Si/SiO2 substrate (monocrystalline silicon wafers with thermally grown oxide) with Pt base electrode deposited on the TFS 200 Beneq equipment (Fig.1 and Table 2). After deposition, the samples were annealed in an oxygen atmosphere at a temperature of 200°C for 30 s.
The charts of two-layer structures used in work are shown in Fig.2. The SiO2 layer with a thickness of 100 nm is formed on a substrate of p-type thermally oxidized silicon (100). The titanium adhesion layer with a thickness of 10 nm is deposited on the SiO2 layer followed by deposition of the platinum base electrode using electron beam evaporation. The counter electrodes Pt are formed by electron beam evaporation using a metal mask. The area of counter electrodes is 10-4 cm2.
The sequential arrangement of aluminum oxide and titanium layers was varied in the pursuit of the research goal. It was assumed that this would extend the functionality and improve the basic parameters of operational structures with the resistance switching and memorizing effects. Formally, the Pt/TiO2/Al2O3/Pt systems are symmetric, but have different electrical properties: for example, the resistance values of the structures after fabrication differ by seven orders of magnitude. Thereinafter, the resistance was measured using low (0.1 V) DC voltage. It was assumed that this did not significantly change the properties of the examined structures. Such noticeable differences in the resistance values of multilayer structures could be associated with the their fabrication peculiarities, in particular, with different thermal exposure duration in the synthesis of films (substrate temperature of 200°C) and possibly atmospheric effects during the annealing process after deposition (200°C, 30 s). In the first case, the "lower" film during the synthesis is at an elevated temperature for twice as long. At the time of annealing, the atmospheric effect on the "upper" layer may be significant. Note that in the present work, the layers are counted beginning from the substrate, i.e. from bottom to top.
Pt/Al2O3/TiO2/Pt Structures
The VA characteristics of Pt/Al2O3/TiO2/Pt structures are typical for memristors and demonstrate bipolar resistance switching between two stable non-volatile states (Fig.3a). It is the behavior, which is fundamental for creating non-volatile resistive memory. Stable bipolar switching with a resistance ratio Ron/Roff of about 102, driven by a low voltage of ±0.8 V (Table 3), was observed after preliminary two-stage electroforming. The high resistance state (HRS) was 2000 Ohms, and the low-resistance state (LRS) was 28 Ohms.
We assume that the first step of the non-trivial two-stage electroforming process is associated with the irreversible disruption of the Al2O3-layer: when a positive voltage (+5 V) was applied to the counter Pt-electrode (with a current limit of 10 mA), the current between the electrodes sharply increased to the limit with a significant emission of Joule heat, subsequently causing an irreversible heat disruption in the Al2O3 layer. The resistance changed by two orders of magnitude, and the system switched from the initial to "interim" state.
The second step is creation of a TiO2-x layer enriched with oxygen vacancies near the counter Pt-electrode with –2.2 V applied to it. The layer near the counter Pt-electrode is enriched with oxygen vacancies, i.e. it forms an oxygen-depleted titanium oxide layer TiO2-x. In this case, the system changes its state from the "interim" to high resistance (HRS).
The switching-on process (ON) occurs when the counter electrode receives +0.8 V (Fig.3b), and the system changes from HRS to LRS. The resistance value is changed by two orders of magnitude: from 2000 Ohms to 28 Ohms. The opposite switching (OFF) and return to HRS (Fig.3c) occurs at 0.8 V. This type of structures is characterized by a steady switching between two states, wherein both the states demonstrate a non-volatile memory effect.
Pt/TiO2/Al2O3/Pt Structures
With the opposite arrangement of TiO2 and Al2O3 layers, the resistance of structures is higher by more than seven orders of magnitude. It is clear that this value can only be attained by using an Al2O3 layer (its specific resistance is 1013–1015 Ohm·cm in contrast to 104–107 Ohm·cm for titanium oxide). The specific resistance of undoped anatase and rutile are in the range of 104–107 Ohm·cm, but with the formation of Ti3+, it is reduced to 10 Ohm∙cm for anatase and 100 Ohm∙cm for rutile [46].
It is reasonable to believe that the active switching layer in this case is Al2O3, and the TiO2 layer acts as a reservoir for oxygen vacancies. This structure stably demonstrates multi-level switching effect without a preformation process. It means that the two-layer structure of this type is ready for switching right after it is synthesized (Fig.4a). In other words, the formation process is accomplished at the stage of fabrication, i.e. synthesis and high-temperature annealing. This technology is obviously advantageous in terms of matching with the "classic" CMOS processes for creation of specialized computing systems.
The set process (SET) for the Pt/TiO2/Al2O3/Pt structures occurs at a negative voltage applied to counter electrode, and the reset process (RESET) is at a positive voltage, i.e. switching occurs in the clockwise direction, (whereas in the previous case, it was counterclockwise). These cycles are stably reproduced with resistance change by seven orders of magnitude, i.e. from 8∙1012 to 6∙105 Ohms. The switching level depends on the voltage that reduces the memorized resistance.
When negative voltage is applied to the counter electrode, oxygen vacancies drift from TiO2-x to Al2O3, thus causing a band diagram displacement resulting in the injection of charge carriers (Fig.6a).
The increase in the concentration of oxygen vacancies increases the concentration of traps (1.5 eV energy [47]) in the Al2O3 bandgap (Fig.5b) and results in emergence of conductivity in Al2O3-layer (Fig.5a). The concentration of traps depends on the applied voltage. Therefore, we can observe the emergence of conductivity and change in switching levels. The hopping transport in trap centers explains the significant conductivity rise with a small change in the potential on the counter electrode.
The dependence of the Al2O3-layer conductivity on the difference of potentials between the electrodes and, as assumed, on the concentration of localized states (N) is determined by the hopping transport mechanism, when the conductivity is subject to inelastic tunneling between the closest centers [48, 49]. It is obvious that the dielectric layer resistance in this case is determined by a grid of random resistances (Abrahams-Miller) and, to a first approximation, by the percolation radius r = 0,085 N-1/3:
,
where а = ε is the Bohr radius.
The injection into the volume can be carried out by tunneling through the Fowler-Nordheim mechanism or thermionic emission and thermally stimulated tunneling. Thermally stimulated tunneling dominates under medium fields and medium temperatures, when the thermal energy is insufficient to overcome the potential barrier at the contact.
Electronic components
of a memristor neuromorphic platform
Two-layer MDM systems of Pt/TiO2/Al2O3/Pt and Pt/Al2O3/TiO2/Pt with considerably distinct properties helped to obtain memristor structures with stable bipolar switching. The proposed switching mechanism opens up prospects for designing multi-level systems based on multilayer structures. The creation of modern micro- and nanoelectronic elements based on new physical principles opens up unlimited prospects for improving the parameters of non-volatile memory devices and developing analogous computing systems, including neuromorphic ones.
The ultimate goal of creating a new non-volatile memory device, or memristor, which functions based on resistance change (switching), is to develop systems that provide earlier unattainable parameters and features:
energy independence and energy efficiency (storage in the memory of a state corresponding to a particular conductivity rather than a charge);
multi-level logical states (storage in a single memory cell of more than one bit of data);
ultra-high density recording of information (multilayer three-level arrangement with minimum energy emission);
ultra-high speed data exchange (integration of operational and long-term memories);
unlimited information storage time ("storing" a resistance level rather than a charge).
The combination of the above functionalities has outlined the prospects for the so-called neuromorphic memristor computing platform with the following main features:
RAM with memristor memory cells (crossbars);
optical switching system of functional modules;
new computing architecture and technology, including:
integration of operational and long-term memories and new technology of data exchange;
architecture, where the memory plays a key role in performing calculations;
new data storage technology;
new operating system.
The main executor of this project titled Machine is HP’s LAB8 laboratory. A significant role in its implementation is played by Sandisk, which took over the development of SCM (Storage Class Memory) technology with the aim of building a system of Memory-Driven Computing. Among software developers of memristor-based neuromorphic computing platform, we should note Boston University, which creates specialized software called MONETA (Modular Neural Exploring Traveling Agent) for memristor memory to simulate some elements of the mammalian brain functional activity. An important place within the evolution of computer platforms is occupied by The EU Human Brain Project realized under the Horizon 2020 program. Neuromorphic physical models (for example, 20-level artificial neural network with a basic level of 4 million neurons and 1 billion synapses) and computer clusters (4Тflop/s) play a significant role in its implementation.
The major information and communication platforms for neuromorphic computing environments with various designs and technological embodiments are:
neuroinformation platform;
medical information platform;
brain modeling platform;
high-performance computing platform;
neuromorphic computing platform;
neurorobotics platform.
The illustrated experimental results [50, 51] of creating memristor structures as the basis for a new neuromorphic computing platform were worked out by the authors of this article, who represent the NIMS (National Institute for Materials Science, Japan) and St. Petersburg State Electrotechnical University (LETI) in the framework of the international project "Controlled synthesis of memristor structures based on nanoscale compositions of metal oxides by atomic layer deposition" (the work was carried out under Project 14.584.21.0005 funded by the Ministry of Education and Science of the Russian Federation).
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