The creation of a multifunctional single-chip very large scale IC can significantly improve weight and size characteristics of the final product, reduce the cost, improve the reliability and stability of the manufacturing process. An actual task is the development of single-chip UHF transceivers. Usually for the manufacture of separate blocks of high-frequency tract MMIC obtained with the use of A3B5 compounds, the most common GaAs and GaN. Generally for production of separate blocks of a high-frequency path small ICs are used, which are made with the use of A3B5 compounds, the most common – of GaAs and GaN. Major limitations of these technologies are the high cost of goods and a relatively low percentage yield. For these reasons, the use of these technologies in manufacturing of very large scale ICs is not appropriate, especially for commercial ICs. Until recently, silicon technology, which is well proven in the production of digital and mixed-signal very large scale IC , does not allow to achieve the required microwave characteristics, in particular, of amplification and noise figure. With the development of silicon technology and the reduction of the feature sizes to 180 nm and below, it became possible to manufacture silicon MMIC with the desired microwave characteristics. Despite the fact that the parameters of the silicon MMIC are still worse than that of components based on A3B5, integration of digital and microwave parts on a single crystal makes relevant the development of microwave devices with use of silicon technology.
The development of very large scale ICs is a complex task, requiring large expenditures of time and resources. In some cases, obtaining the required characteristics requires several production iterations. To reduce the time and costs of design, as well as the number of production iterations, it is necessary to use a special library containing the behavioral models of all elements. Even more effective is the use of the library of complex function blocks (CFB), which represent the topology of some functional part with known characteristics. MICROWAVE MODEL OF MOS TRANSISTORS The typical structure of the MOS transistor is shown in Fig.1 . For microwave applications, the transistor cutoff frequency ft is one of the most important parameters. According to  it is defined as the frequency at which the small-signal current amplification factor H21 is equal to one (0 dB). For 180 nm technology the typical values of the cutoff frequency of nMOS transistors are about of 30–40 GHz, and the typical values of the cutoff frequency of pMOS transistors are from 15 to 20 GHz. When choosing technology that ensures reliable operation of the circuit, the rule is used according to which the cutoff frequency of the transistor should be not less than 10 times higher than the chip speed . Thus, the 180 nm CMOS technology can be successfully used to create circuits with chip speed up to 3–4 GHz. However, in some applications it is possible to build circuits, which speed is 4–5 times below the cutoff frequency of the transistor. This is especially important for circuits, based on the signal selector. Other important characteristics of a MOS transistor are: maximum oscillation frequency fmax, i.e. the frequency at which the amplification is equal to 1; minimum noise figure NFmin; third-order intermodulation point Vip3; thermal noise id2. Below are formulas to calculate these parameters [3, 4]: form01_eng.ai form02_eng.ai form03_eng.ai form04_eng.ai form05_eng.ai where K is Boltzmann constant; gm is conductivity; gm" is the second derivative of the conductivity; Cgg, Cpar, Cgso and Cgdo are input capacitance, parasitic capacitance of the gate-substrate and junction capacitances for drain-gate and source-gate; Rg and Ri are gate resistance and the real part of the input impedance due to non quasi-static effects, respectively; Rs is source resistance. Usually standard set of design tools include models of the circuitry developed for digital and low frequency analog design. However, typically these models incorrectly describe the behavior of devices at high frequencies, as it does not take into account all the effects. Shown in Fig.2 four-port MOS transistor can be divided into two parts: the internal and the external transistor. External transistor contains such components as a shutter resistance Rs, gate-to-drain overlap capacitance Cgdo, gate-to-source overlap capacitance Cgso and others, which does not take into account the digital model of the transistor. Fig.3 shows an example of a microwave transistor model . The development of microwave model in this paper is based on the BSIM4SOI4 model with added external components, which take into account the effects at high frequencies. The test chip was measured using a hardware-software complex (Fig.4). Fig.5 compares the results of modelling and measurement. SET OF COMPLEX FUNCTION BLOCKS FOR CREATION OF WIRELESS TRANSCEIVER Table 1 shows a set of blocks which is planned to be included in the CFB library. All blocks are manufactured by domestic 180 nm CMOS SOI technology at MERI and Mikron JSC in the standard production process that guarantees high yield rate, reliability and product quality. The measurements were carried out with the help of special hardware-software complex on the basis of Agilent equipment. Low-noise amplifier (LNA) is one of the key blocks in the microwave receiving path of telecommunication, radar and navigation systems. Its mission is to increase small signal to the required level, making the minimum noise. Designed LNA is built using single-section layout on n-MOS transistors (Fig.6). When creating a modern multichannel microwave devices it is necessary to solve the problem of switching microwave signals between the channels. This requires microwave switches, which allows switching the microwave signals so that there were no restrictions on operating frequency, switching speed, power. Signal switches are constructed according to the scheme shown in Fig.7. Depending on the desired frequency band the optimum values of the widths of the feed-through and bypassing transistors are individually selected. The objective of this optimization is the achievement of a minimal level of insertion loss in the on state whit sufficient level of isolation in the off state. Digital attenuators are widely used in many modern communication systems, allowing to adjust the attenuation with a fixed step. Typically, the digital attenuator is a set of resistive attenuators of P- or T-type, separated by a signal switches that allows to pass the signal through a resistive attenuator, or bypassing it with minimal insertion loss . In this case, the level of insertion loss is determined by the following formula: Lат = 2NLпер + NLпроход where N is the attenuator capacity, Lпер is loss in one switch, Lпроход is loss of insertion-through channels of switched off attenuator cells. In this regard the attenuator scheme based on the proposed in , which is based on the inclusion of switches in the cells and blocking of the two sections, is used. Fig.8 shows the circuit diagram of the attenuator, and Fig.9 – topology of the chip for experimental studies of two designs of the attenuator with different management interface and SPDT switch optimized for a frequency range of 8–12 GHz. Microwave phase changers are most common used in phased-array antennas of superfast information processing systems and in multipurpose measuring devices. One of the main parameters of multi discrete phase changer are the maximum phase shift and minimum discrete. Circuit diagram of the developed phase changer is shown in Fig.10. Fig.11 shows a test chip containing the phase changer, low noise amplifier and signal switch, which is connected to the bonding areas for measurements using an automated complex. CONCLUSION A library of microwave components and CFBs for correct simulation of the electrical properties of microwave transistors at frequencies up to 12 GHz is developed. A set of CFBs obtained using these models is presented. The characteristics of CFBs correspond to the level of technology. Developed library will allow to model effectively complex digital-to-analog very large scale IC for the serial production at MERI and Mikron JSC. ■ The project is supported by the Ministry of education and science of the Russian Federation in the framework of the Federal target program "Research and development on priority directions of scientific and technological complex of Russia for 2014-2020" according to the agreement No.14.579.21.0072 dated 24 November 2014 (unique identifier of applied research RFMEFI57914X0072, code of project 2014-14-579-0129).