Common methodological approach to evaluation of radiation resistance of gate arrays and semicustom very large scale ICs based on them
The main advantage of semicustom ICs on GA compared to equivalent custom-made circuits is the significant reduction of time of designing and manufacture, primarily through the use of specialized CAD and the relatively small number of additional operations that ensure the implementation of the specific chips on the prepared semiconductor base.
IC on GA have the following features:
fixed geometric structure of semiconductor areas, which significantly simplifies the automatic placement and routing of elements;
small number of additional masks, significantly reducing costs in the production of ICs;
presence in the design of some GA of digital, digital-to-analog and analog elements.
The use of IC on GA in equipment for space and nuclear facilities requires the provision and evaluation of radiation resistance of products during their design and manufacture. Evaluation of radiation resistance of ICs is based on a rational (necessary and sufficient) amount of tests with obtaining of a needed information by taking into account the dominant radiation effects, and parameters-criteria of validity, modes and conditions of operation of ICs.
DOMINANT RADIATION EFFECTS
IN GA AND SEMICUSTOM IC
ON THEIR BASIS
In GA and semicustom ICs on their basis the following types of radiation effects are dominated:
dose ionization effects at influences of gamma particles, electrons and protons;
ionization effects of dose rate at influence of gamma-ray pulse;
effects of structural damages at influence of neutrons and protons;
local ionization effects at influence of individual nuclear particles.
In ICs implemented using nanoscale CMOS processes, in case of dose ionizing radiation [1-4] the appearance of radiation-induced current leakages in the power supply circuit due to the accumulation of charges in thick insulating oxide, the shifts of threshold voltages of the MOSFETs (this effect is less significant for modern chips), the degradation of slope (mobility) and subthreshold swing of the transfer characteristic are observed. Thus, with the decreasing design rule a dominant mechanism of degradation of the CMOS elements are radiation-induced leakage currents.
The characteristic feature of bulk CMOS technologies is the presence of two components of radiation-induced leakage current – intertransistor and inside-transistor due to thick dielectric layers (usually, Shalow-Tranch-Isolation). Under impulse influences, the ionization effects of dose rate occur including latch-up, catastrophic failure, the voltage drop in the power supply circuit due to leakage of high-power pulsed radiation-induced currents.
CMOS structures have low sensitivity to the effects of structural damages due to the fact that the active elements use main charge carriers .
The impact of individual nuclear particles can lead to catastrophic failures, latch-up, and also to single failures [6, 7] arising in registers of memory cells and other serial devices. A specific class of radiation effects, which is important for IC on GA with decreasing design rules and, consequently, increasing limit frequencies of operation, are digital "needles" (Digital SET) – short-term interferences that lead to false switching of the trigger or omissions of the clock signal [8–10]. These "needles" can be external and internal. External "needles" are dangerous for circuits connected directly to the contacts of GA, and may interfere the operation of the device as a whole. Internal "needles" in asynchronous circuits can change logic of operation of the device in the GA and to affect the operability. If the combinational circuit, in which there was "needle", ends with the storage element, it is possible false switching of the trigger. "Needles" are characterized by the amplitude and pulse duration. The standard durations for the 90–130 nm CMOS process are from 100 to 2000 ps.
FOR EVALUATION OF RADIATION RESISTANCE OF GA AND IC
BASED ON THEM
The purposes of assessing the radiation resistance may be certification of designing and technological platform of GA (the process and means of IC design based on it) for forecasting (guaranteeing) of the typical (expected) and maximum levels of resistance of finished products and for the qualification of IC on GA (lining) to ensure the specified levels of radiation resistance or the assessment of their stability. The main objective in organizing of the evaluation of radiation resistance for IC on GA is providing a rational combination of informational content and technical-economic efficiency of tests to guarantee the operational performance at an acceptable time and costs.
The following elements can be subjects to tests and evaluation of radiation resistance:
The set of a basic design and library of elements of GA in the form of a special test lining, which is the most informative for characterizing the properties and characteristics of GA (in fact, the simulator of GA for testing) and is called the "standard evaluation circuit" (SEC) (slang name – "zero lining"). Requirements to structure and principles of formation of SEC are described in [11, 12].
Specific semicustom IC on GA (slang name – "working lining"), performing a predetermined function with use, as a rule, of only a part of the elements library of GA.
It should be noted that in the engineering practice the qualification tests of SEC are conducted as a rule at the conclusion of the development of the GA, and then the control of each batch of wafers is carried out with the "base" in the volume of requirements of the sub-group "E" of ОСТ В 11 0998 (ОСТ В 11 1010) and using the results of tests of the same SEC. The results of control spread on all linings of GA manufactured under a controlled production batch of the "base".
The following basic criteria parameters define the radiation resistance of digital GA:
static electrical parameters, including output voltage (with appropriate load), leakage currents and current consumption (static and dynamic);
dynamic parameters, including propagation delays, access times, maximum operating frequencies, dependencies of type of minimum supply voltage on frequency, etc.;
availability and thresholds of the latch-ups (LU) and catastrophic failures (CF).
During the development of methods of radiation tests the selection of the most radiation-sensitive criteria parameters is performed with the aim of reducing the volume of measurements and monitoring of performance without information loss.
The most demanding procedures of design, production and certification are performed on the stage of development of the GA and are applied to semicustom ICs based on them. Performance parameters of IC are determined by the parameters of GA and are confirmed by the qualification tests. In order to confirm the parameters specified in technical documentation an inspection of experimental batch of certificated IC is carried out and group specifications are issued .
If the specified (desired) level of radiation resistance of the IC on GA corresponds with no reserve to the normative level of resistance, then, generally, to ensure the necessary level of assurance it is necessary to carry out the radiation tests of each working lining of GA. Main approaches to functional control of very large scale IC based on gate array in process of radiation tests are given in table.
Both of the presented approaches to the functional control IC on GA are quite resource-consuming, as for each working lining is required to perform a complete cycle of radiation tests.
However, if during the radiation tests of the SEC made within the framework of a general production batch of GA at the control of batches of wafers (subgroup E according to ОТУ) or, in the future, during periodic testing (radiation testing as a part of periodic that are not provided in the current ОТУ, but are assumed to introduction in their new editions) a sufficient reserve of a level of radiation resistance of SEC relative to the standard level of GA is provided, and the SEC involves all library elements used in the working lining, with the necessary completeness and informativeness of their control, then it is permissible to extend the results of radiation tests of SEC for the corresponding working lining of IC. This will allow to significantly reduce production costs and to improve technical and economic indicators of production. It should be noted that this approach is applicable for all types of semicustom ICs, manufactured within a given production batch of wafers, and after the introduction of radiation tests in the structure of the periodic – for all batches of wafers produced in the controlled period, to which it is admissible to extend the test results of SEC.
Radiation tests of IC on GA are conducted according to methods of GOST РВ 5962-004.10-2012 in radiation testing centers using certified systems and methods that are issued in the prescribed manner. It is advisable to provide a rational combination of simulating and modeling facilities, at which the main volume of the radiation tests is performed on simulators (x-ray, laser), and radiation support is carried out on the basis of the calibration on the modeling devices (isotopic gamma sources, brake gamma radiation systems, charged particle accelerators). At the same time the regular character of semiconductor regions in the structure of GA chip, uniform density of metallization and, most importantly, the unity of tested SEC, greatly simplify the calibration and allow the dissemination of its results on a wider set of test products [14, 15].
The most promising methods for rapid assessment and forecasting of radiation resistance of IC on GA in conditions of development and production are the radiation tests and studies of the SEC chips, and in necessary cases of the working linings, without their packaging with the use of workstations based on laser and x-ray simulators, probe stations and kits of universal automated measuring equipment . The structure of the automated probe, widely used by the author in the practice, is shown in Fig.
At a stage of development of GA the development or adaptation of manufacturing techniques providing the requirements of specification, including radiation resistance, development of functional cells, the development of (as a typical representative) IC for certification with all the basic cells that allow to confirm as a result of qualification tests, the specified parameters, are carried out .
Provision and evaluation of radiation resistance in the design of GA require modeling, experimental studies and, if necessary, revision of the libraries of standard cells based on the data about radiation resistance. As complementary elements to the standard components of a set of design tools, the SPICE models with radiation parameters, design rules to ensure the conservation of indicators of durability and reliability that are used for prediction of models, libraries of radiation-resistant elements, and also radiation-resistant parameterized cells are required [18, 19].
Thus, the creation of SEC for the assessment and forecasting of radiation resistance of all components and blocks of the GA and its radiation tests and studies with the provision of needed accuracy are mandatory elements of the base design route of GA and IC based on them.
In the process of manufacturing GA and IC based on them it is necessary to support the level of quality established during the qualification of products in compliance with the order of measures for the control of stability of technological processes in terms of radiation resistance . The latter includes the following main measures:
control the radiation resistance of products on a continuous or periodic basis using the results of tests of SEC;
statistical process control and a built-in monitoring of indicators of radiation resistance, using SEC and parametric monitors.
Quality control and radiation resistance control of products can be conducted on a periodic basis under the following conditions:
continuous built-in control of the radiation resistance on the basis of tests of parametric monitors on wafer using the probe systems or testing of packaged test structures are implemented;
correlation parameters for the test items, SEC and finished products are defined;
there is a sufficient margin at the actual level of resistance of products, determined using results of the radiation tests and studies of SEC, relative to a normative level of resistance of GA;
rhythmic release of batches of products is implemented and the batches volume is sufficient for a statistically accurate evaluation of test results.
In case of nonfulfilment of the above conditions it is necessary to carry out continuous monitoring of production batches, that is, to control every batch of wafers by subgroups E1, E2, E3 in accordance with ОСТ В 11.0998-99 or ОСТ В 11 1010-2001.
The common methodological approach to the evaluation of radiation resistance of gate arrays and semicustom very large scale ICs based on them, which ensures the necessary list of the control and test activities, including creation and radiation tests of generic evaluation circuit at the stages of design and manufacture of GA and IC based on them, is developed and substantiated. This ensures the rational combination of reliability and informational content of the assessment (guarantees) of radiation resistance with a techno-economic efficiency of production.
The main features of very large scale ICs based on the gate arrays in relation to the objectives of ensuring and evaluation of their radiation resistance are analyzed, the dominant radiation effects in very large scale ICs are summarized.
The main elements of a common methodology for the evaluation of radiation resistance of gate arrays and semicustom very large scale ICs based on them are presented, the order of the choice of test items, the test equipment with emphasis on radiation tests of ICs without their packaging are described, the peculiarities of dosimetric support, in particular, relative simplicity of calibration for IC on GA are noted.
The contents and milestones for the evaluation of radiation resistance of very large scale ICs based on the gate arrays at the stages of design and manufacture are considered.
Implementation of the proposed methodological approaches and of set of measures helps to ensure the relevance and competitiveness of ICs on GA for application in equipment with increased requirements for radiation resistance.
The author expresses his gratitude to A.Nikiforov, A.Denisov, A.Ulanova, V.Koniakhin for the valuable advices and assistance in the preparation of this paper.
This paper was created with the financial support of the Ministry of Education and Science of the Russian Federation. Unique identifier RFMEFI58015X0005.