Developing and Manufacturing Integrated Microcircuits for Industrial Application
1. Foreign companies periodically slightly changed the technological process of microcircuits production, which, usually, resulted in frequency reduction within 10 %. That leads to a possibility of facing a situation, when a microcircuits batch ordered some years after ending the design and development works will differ from the original, and some characteristics may not comply with the design documentation.
2. Sometimes the applied foreign technological processes are closed and new similar processes are introduced, leading to the necessity of redesigning microcircuits and performing routine tests.
3. In rare cases, when factories producing wafers with microcircuits chips are closed or sold, there is a necessity of finding another company with close technological processes.
4. There are cases of phasing out plastic packages of microcircuits that are regularly used. Then it becomes necessary to create packages at other companies, which results in additional costs.
5. Commercial CADs do not make it possible to perform design modelling in case of some extreme operating conditions.
6. In case of production at foreign factories it is necessary to declare end users of microcircuits, which is not always convenient in terms of commerce.
7. There is no production of dynamical and Flash memory in Russia; foreign microcircuits are regularly taken out of production, which leads to the necessity of modules modernization. Stocking microcircuits for many years ahead is not economically expedient.
8. The absence of mass demand for microcircuits on Russia’s market results in microcircuits high cost and does not allow the companies proper development. Putting domestic microcircuits on the world market is problematic, as no one wants to give up their own markets. The further branch development is impossible without government’s support.
9. Russia does not have a sufficient number of developers; for the Institute’s further development it was necessary to carry out its own training of specialists.
The indicated problems cannot be solved without the entire possession of projects being created. The utilization of foreign IP-modules makes it impossible to transfer the project to another technology without modifying microcircuit characteristics. If your modernized microcircuit with respect to new technology parameters changes even insignificantly, it may affect the operation of the end product using this microcircuit, and the end product cost together with software will be greater than costs on developing the microcircuit by several fold. Thus, while designing the microcircuit it is necessary to understand its service life and the necessity of supporting its issuing. That is why the policy of the Institute consists in using only its own IP-modules for industry-oriented microcircuits. This made it possible to support issuing a number of microcircuits over a period of about two decades despite modernization of several foreign technological processes and the closure of a number of factories.
Another problem is creating microcircuits that can operate in specified operating conditions. Western companies divide microcircuits into such categories as commercial, industrial, aviation, military and space-oriented. In accordance with these categories, foreign CADs used for microcircuits design allow all the necessary inspections; respective elements libraries are created. Standard libraries of CMOS-processes are typically specified within the temperature range from –40 °C to +125 °C, which is quite sufficient for most applications. However, to create microcircuits to be used in space, for such technological processes as rail road switches control, controllers for oil and gas industry etc., one needs lower operating temperatures, down to –60 °C. In this case it would be appropriate to specify library for required temperatures, but it would result in significant time and material costs. Experience has shown that to this end it is sufficient to utilize the advantages of modern CADs for tuning coefficients in the course of topology design. For example, while designing microcircuits using Innovus CAD, to provide microcircuits operability in wide temperature range it is possible to use the following CAD instructions:
1. Instruction update_rc_corner permits one to reduce or increase resistance and capacity values of interconnections for specified combinations of technical process conditions, voltage supply and temperature.
2. Instruction set_timing_derate sets scaling coefficients of time delays in setup and hold routes.
3. Instruction set_clock_uncertainty sets the value of misalignment for clock signal on a chip.
Coefficients have to be chosen experimentally, but the more we “restrict” the design by these coefficients, the greater is timing diagram margin. Taking into consideration that foreign companies often change technological process without notification and microcircuits parameters may be slightly changed, this margin makes it possible to reduce possible risks.
While transferring to the technology with 65nm element size and lower, there arises quite a number of problems of designing complex high-performance microcircuits. First of all, geometry size reduction results in an increase of transistor parameters scatter, as well as leakage current, and leads to a significant dependence of parameters on supply voltage scatter and chip temperature. For such microcircuits as modern high-performance microprocessors, the spread of chip temperature may exceed 5 °C, and supply voltage slumps may exceed 10 %. To achieve limiting parameters for the frequency of developed microcircuits, it is necessary to consider all these scatters while modelling. Standard commercial CADs allow one to perform modelling for worst cases in terms of temperature, process tolerance and supply voltage with respect to all the above mentioned phenomena, which permits obtaining microcircuits operability. Nevertheless, it does not allow one to obtain limiting parameters. To build a clock tree for high frequency microcircuits is another challenge. It is necessary to resort to circuit level compensation for the process variations, scatter in supply voltage and temperature. Commercial CADs do not make it possible to solve arising problems in full measure; they are oriented at achieving microcircuits operability, rather than limiting frequencies.
The research made by Petrosiants К. О. group  has demonstrated 22.9ps delay in signal propagation in interconnection line for 4-bit adder of FPGA series 6501ХМ1 (not considering non-uniformity of temperature profile achieving limiting scatter of 4 °C) and 31.9ps delay (with proper non-uniformity consideration) i.е. the neglect of thermal effects results in error equal to 28 %. What does it mean in practice? Modern commercial CADs enable one to conduct modelling for worst case, and the error of 28 % is considered exactly as a required margin in the circuit being created, rather than as a possibility to consider it in respect of ability to increase the microcircuit operating frequency by topological and circuit level corrections. Similar data may be obtained for supplying voltage slump. Largest world companies also use commercial CADs in their design flow, but for achieving limiting parameters they develop additional programs that consider these effects.
No less complicated is the task of considering radiation effects. For obtaining required parameters of radiation hardness it is necessary to consider the effects arising at circuit level chip topology, i.e. it is necessary to perform the design correction. What is more, the design correction should be different for various microcircuit nodes, depending on specific effects, which is impossible to be done using standard commercial CADs.
Increases in microcircuit performance can also be provided by optimizing the technological process for a certain microcircuit. For modern high-performance microcircuits it can be done only by largest companies with mass production in leading wafer manufacturing companies. Regretfully, domestic enterprises are incapable of applying limiting design standards, due to lack of additional resources and because of foreign technological processes that are not developed on their own, but are purchased, and there is no deep understanding of the underlying physical processes.
Supporting domestic microcircuits production also poses problems. Small microcircuits batches result in considerable costs which makes them competitive only for critical industrial applications. While organizing the production of these microcircuits it is necessary to bear in mind that their market considerably differs from the commercial one, and the production output increases gradually. Fig. 1 shows the process of manufacturing a 32-bit microprocessor and its system controller. The lower system controller output indicates that a number of companies prefer to create their own controllers based on FPGA. The graph shows that over a decade the volume of the microprocessor production increased by an order of magnitude. Thus, the creation of small-batch manufacture with no prospect of development may cause significant problems while providing the microcircuits output. The enterprises should not be told that their production capacities are limited and an increase in the output is impossible, because in this case nobody will ever cooperate with you in the future.
Therefore, the research has shown that without developing design tools and producing microcircuits of our own it is impossible to create microcircuits with limiting parameters of operation. Full possession of designs is obligatory, because the use of foreign IP-modules may hinder the support of microcircuits issuing over a long time. To provide the company’s development it is necessary to organize the training of its specialists. As for the Institute, we have been training specialists jointly with MEPhI National Nuclear Research University.
1. Petrosyants K. O., Batarueva E. I., Rya¬bov N. I. Raschet zaderzhek v mezh¬so¬e¬di-
neniyakh tsifrovykh BIS s uche¬tom elek¬tro¬tep¬lo¬vykh effektov // 16-ya nauchno-tekhnicheskaya konferentsiya, Suzdal', 2017. P. 51–52. (In Russian).