The paper analyzes the main features and shortcomings of the existing system for ensuring radiation resistance of very large scale ICs based on gate arrays through the development and testing of the generic evaluation circuit (GEC). It is proposed to include all of the basic library elements into the structure of GEC. It is also proposed to maximally unify the GEC for characterization of gate arrays and control of batches of wafers, analysis of features of control of technology stability and estimation of radiation resistance of the working firmware based on test results of GEC.


Разработка: студия Green Art